1. Field of the Invention
Embodiments of the invention generally relate to methods for depositing a catalytic layer on a barrier layer, prior to depositing a conductive layer thereon.
2. Description of the Related Art
Multilevel, 45 nm node metallization is one of the key technologies for the next generation of very large scale integration (VLSI). The multilevel interconnects that lie at the heart of this technology possess high aspect ratio features, including contacts, vias, lines and other apertures. Reliable formation of these features is very important for the success of VLSI and the continued effort to increase quality and circuit density on individual substrates. Therefore, there is a great amount of ongoing effort being directed to the formation of void-free features having high aspect ratios of 10:1 (height: width) or greater.
Copper is a choice metal for filling VLSI features, such as sub-micron high aspect ratio, interconnect features. Contacts are formed by depositing a conductive interconnect material, such as copper into an opening (e.g., via) on the surface of insulating material disposed between two spaced-apart conductive layers. A high aspect ratio of such an opening may inhibit deposition of the conductive interconnect material that demonstrates satisfactory step coverage and gap-fill. Although copper is a popular interconnect material, copper suffers by diffusing into neighboring layers, such as dielectric layers. The resulting and undesirable presence of copper causes dielectric layers to become conductive and electronic devices to fail. Therefore, barrier materials are used to control copper diffusion.
A typical sequence for forming an interconnect includes depositing one or more non-conductive layers, etching at least one of the layer(s) to form one or more features therein, depositing a barrier layer in the feature(s), and depositing one or more conductive layers, such as copper, to fill the feature. The barrier layer typically includes a refractory metal nitride and/or silicide, such as titanium or tantalum. Of this group, tantalum nitride is one of the most desirable materials for use as a barrier layer. Tantalum nitride provides a good barrier to copper diffusion, even when relatively thin layers are formed (e.g., 20 Å or less). A tantalum nitride layer is typically deposited by conventional deposition techniques, such as physical vapor deposition (PVD), atomic layer deposition (ALD), and chemical vapor deposition (CVD).
Tantalum nitride does have some negative characteristics, which include poor adhesion to the copper layer deposited thereon. Poor adhesion of the subsequent deposited copper layer(s) can lead to rapid electromigration in the formed device and possibly process contamination issues in subsequent processing steps, such as, chemical mechanical polishing (CMP). It is believed that exposure of the tantalum nitride layer to sources of oxygen and/or water can result in oxidation thus preventing the formation of a strong bond with the subsequently deposited copper layer. The interface between a tantalum nitride barrier layer and a copper layer is likely to separate during a standard tape test.
Typical deposition processes utilize precursors that contain carbon which becomes incorporated in the deposited barrier layer. The carbon incorporation is often detrimental to the completion of wet chemical processes since the deposited film tends to be hydrophobic which reduces or prevents the fluid from wetting and depositing a layer having desirable properties. To solve this problem, oxidizing processes are often used on barrier layers to remove the incorporated carbon, but these processes can have a detrimental effect on the other exposed and highly oxidizable layers, such as, copper interconnects. Therefore, a process and apparatus is needed that is able to deposit a barrier layer or adhesion layer that is able to enhance bonding adhesion between the various layers, such as Tantalum nitride (TaN) and copper. Also, in some cases a process and apparatus is needed to form an adhesion layer which can be directly deposited on dielectric, non-metallic or other desirable materials.
Therefore, a need exists for a method to deposit a copper-containing layer on a barrier layer with good step coverage, strong adhesion and low electrical resistance within a high aspect ratio interconnect feature.